Technology

iW-x86 Processor

Features :

* Non multiplexed 20-bit address and 16-bit data bus support
* Arithmetic Logic Unit
* 1M-byte memory space divided into 4 segments
* 64 K-byte IO space
* DMA Controller with 4 channels
* Programmable Interrupt Controller
* Serial Controller Unit similar to 8251 with Full duplex double buffer system
* Programmable Wait State generator
* Clock Generator
* RTL code in verilog format
* Bus arbitration unit

Description
Figure-1 : iW-x86 Processor Block Diagram
The iW-x86 processor is fully binary compatible to the
well known 80186 Processor from Intel. This new core is an
excellent choice for many embedded controller applications and it
provides a cost-effective alternative for replacing x86 processors
that are no longer manufactured. This IP core is available as
synthesizable circuit description.
Figure-1 shows iW-x86 processor. This core has nonmultiplexed
20-bit address bus and 16-bit data bus, which
eliminates the need to have address latch enable logic externally
and allow easy connection to memory. It supports 16-bit execution
unit using familiar x86 instruction set and has 1Mbytes address
space. The core incorporates 4-channel DMA controller with two
configurable bus modes and 3 transfer modes for efficient data
transfers, one programmable interrupt controller compatible with
8259 , capable of handling 8 external requesters with the capability
of defining priorities and masking at individual levels allowing
complex priority schemes. One real time programmable timer
compatible with 8254, incorporating three counter/timer
channels. It offers wait control unit, which automatically inserts up
to 8 wait states in CPU and DMAU bus cycle. It also offers a
variable-rate asynchronous serial controller compatible with 8251,
which gives RS-232 protocol support and incorporates a baud rate
generator selectable as transmitter / receiver clock. The bus
arbitration unit performs the arbitration for the internal bus
mastership between CPU and DMA with priority.

Applications

* Quick migration of 80186 based design to an FPGA latform.

* Deliver Retrofit of existing systems, maintaining the I/O ompatibility.

* Replacement for 80186 Processor and ASICs.

* It is an excellent choice for embedded applications, catering or the growing needs of industrial, automotive and ommunication system solutions.

* Extensive use has been in medical instruments designed to erform routine clinical measurements (endoscopes, reathing aids…)

Example Application :

The design has been optimized for the requirement of a
SOC design flow, the block diagram shown in the fig-2 is an
example application which includes additional peripherals like PCI
Target Controller, programmable timer and Multi Protocol Serial
Controller. PCI target controller to manage 32-bit data transfer
between the PCI and the user Interface, MPSC which is general
purpose communication controller consisting of two sets of bidirectional
parallel/serial converter for data communication
supporting the character oriented protocol and bit oriented protocol
communication features and the Timer/Counter unit identical with
the one used in processor. The iW-x86 SOC reduces system size and
weight while dramatically reducing the number of components in
the system by eliminating the reliance on the component that are or
may become obsolete.
This fast-running version raises the high end of our IP
product line, improves the reliability and ensures the long-term
availability and tremendous support.